1. Technical Field
The disclosure relates to a data sampling circuit module, and more particularly, relates to a data sampling circuit module, a data sampling method and a memory storage device.
2. Description of Related Art
In general, for saving power consumption in signal transmission, some data are transmitted by ways of differential signal. After a set of differential signal is received by a receiver device, the differential signal are recovered to input data stream. The input data stream is composed of a series of pulses, and waveforms of the pulses are related to bit data intended to be transmitted. For example, one specific waveform indicates transmission of the bit data “1”, and another waveform indicates transmission of the bit data “0”.
Traditionally, in order to identify the waveform of each of the pulses in the input data stream, the receiver device performs a massive amount of sampling for said data stream by using a clock signal with extremely high clock frequency and rebuilds the waveforms of the pulses in the data stream by analyzing whether signal obtained by the sampling is in logically high of the data stream or in logically low of the data stream. However, such sampling means requires use of the clock signal with extremely high frequency, which consumes more power of the system and has poor efficiency in terms of usages.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present disclosure. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present disclosure, or that any reference forms a part of the common general knowledge in the art.